1. Field of the Invention
The present invention relates to an image pickup device and a signal transmitting device.
Priority is claimed on Japanese Patent Application No. 2011-200422, filed Sep. 14, 2011, the content of which is incorporated herein by reference.
2. Description of the Related Art
All patents, patent applications, patent publications, scientific articles, and the like, which will hereinafter be cited or identified in the present application, will hereby be incorporated by reference in their entirety in order to describe more fully the state of the art to which the present invention pertains.
In recent years, solid-state image pickup devices (hereinafter referred to as “imagers”) that simultaneously output signals (hereinafter referred to as “pixel signals”) of a plurality of pixels have increasingly been mounted on image capturing units of image pickup devices such as digital cameras, as the image pickup devices operate at high speed. Examples of output types of an imager that simultaneously outputs a plurality of pixel signals include an output type of simultaneously outputting pixel signals of two pixels adjacent to each other in a horizontal direction and an output type of simultaneously outputting pixel signals of two pixels adjacent to each other in a vertical direction.
With advancement in performance of future new image pickup devices, various methods of outputting pixel signals from imagers are being considered. However, even when there is a difference between output types of outputting pixel signals from imagers, image capturing processing units (so-called image capturing sub-systems) located at a rear stage to process pixel signals preferably have the same configuration to correspond to imagers that realize various output types.
Accordingly, for example, Japanese Unexamined Patent Application, First Publication No. 2008-005048 (hereinafter referred to as “Patent Document 1”) discloses technology for realizing imagers in which output types of outputting pixel signals are different. FIG. 6 is a block diagram illustrating the overall configuration of an image pickup device in accordance with the related art, as disclosed in Patent Document 1. The image pickup device in accordance with the related art includes image processing units (first and second image processing units) corresponding to the number of channels (two channels in FIG. 6) of image data output from an image capturing unit. An AE evaluation value calculating unit and an AF evaluation value generating unit generate AE and AF evaluation values, respectively, after decimation units of the AE evaluation value calculating unit and the AF evaluation value generating unit perform a process of selecting (decimation) a plurality of simultaneously input image data (in FIG. 6, two pieces of image data), respectively.
In the image pickup device in accordance with the related art shown in FIG. 6, operations are switched depending on the number of channels of image data output by the image capturing unit. More specifically, when the number of channels of image data output by the image capturing unit is one (1 ch), the first image processing unit performs image processing and writes a processed image to a DRAM via a direct memory access interface (DMAIF) unit. Further, the AE evaluation value calculating unit and the AF evaluation value generating unit generate the evaluation values, respectively, without performing the decimation process, and write the generated evaluation values to the DRAM via the DMAIF unit.
On the other hand, when the number of channels of the image data output by the image capturing unit is two (2 ch), the first and second image processing units perform image processing and writes processed images to the DRAM via the DMAIF unit. At this time, when the image data of two pixels adjacent to each other in the horizontal direction are simultaneously input from the image capturing unit to the first and second image processing units, images obtained through the image processing by the first and second image processing units are combined (merged) and the result is written to the DRAM via the DMAIF unit. The AE evaluation value calculating unit performs a decimation process on the input image data, generates an AE evaluation value, and then writes the generated AE evaluation value to the DRAM via the DMAIF unit. Further, when generating a luminance signal (Y signal) based on the input image data, the AF evaluation value calculating unit performs a decimation process, generates an AF evaluation value based on the luminance signal obtained through the decimation process, and then writes the generated AF evaluation value to the DRAM via the DMAIF unit.
Thus, in the image pickup device in accordance with the related art disclosed in Patent Document 1, operations or functions of the constituent elements of the image pickup device are switched depending on the number of channels or output types of the image data output by the image capturing unit, and thus various output types of imagers can be realized.
However, when the image processing units or the like located at the rear stage to process pixel signals output from the imager are configured to correspond to various output types of the pixel signals output from the imager, as in the technology disclosed in Patent Document 1, the DMAIF unit (and functions associated with the control of a DMA by the DMAIF unit) connected to an image processing unit 2 may sometimes operate and sometimes not operate depending on the output types of the image data output by the image capturing unit in the image pickup device in accordance with the related art shown in FIG. 6. More specifically, the DMAIF unit connected to the image processing unit 2 is a circuit that operates only when the output type of the image data output by the image capturing unit is a type of simultaneously outputting the image data of two pixels adjacent to each other in the vertical direction, whereas the circuit does not operate when the output type of the image data is a type of simultaneously outputting the image data of two pixels adjacent to each other in the horizontal direction. Further, as in the AE evaluation value calculating unit and the AF evaluation value calculating unit, there are circuits that operate or do not operate depending on the output type of the image data output by the image capturing unit.
Thus, in the method in accordance with the related art, to correspond to various output types of the pixel signals output from the imager, an unnecessary circuit that may not operate depending on the output type of the pixel signals output by the imager mounted on the image pickup device may be present in the image processing unit or the like at the rear stage. Since the unnecessary circuit increases the circuit size of the image processing unit or the like, the unnecessary circuit is preferably not present in the image processing unit or the like.